2.2 输出延迟（Output Delay）：1.2ns Æ set_output_delay $O_DELAY -clock MY_CLOCK [all_outputs]
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该算法能够控制子任务执行顺序和降低控制输入输出延迟。
This scheduling algorithm can control the execution sequence of subtasks and reduce control input output delay.
延迟电路26i和延迟电路26 Q中的每一个以根据目标位置的深度而定的延迟量对连续波进行延迟，并输出延迟的参考信号。
Each of the delay circuits 26i and 26q delays the continuous wave by a delay amount in accordance with a depth of a target position and outputs a delayed reference signal.
这是由于延迟构造和 AXIOM 内的多路技术造成的，它将从一个 API 输入的数据直接转发给另一个 API 输出。
This is due to deferred construction and multiplexing that takes place inside AXIOM and routes data coming in through one API directly out through another.
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