负责带领整个团队实施芯片的综合、静态时序分析、逻辑一致性分析、后仿真、DFT、ATE、功耗控制。从芯片实现的角度对模块的RTL代码和芯片的RTL代码进行把关。
Lead ASIC frond-end design team to complete Synthesis, STA, Equivelant Check, Post Layout Simulation, DFT, ATE, Power Control. Make sure RTL code is ok for chip implement.
所有的功能模块组合起来后，通过EDA工具进行CPU内核的逻辑综合和功能仿真，最后在可编程逻辑器件上实现这个完整的CPU内核。
CPU core was simulated and synthesized by EDA tools after combine all units. In the end, CPU core was implemented in programmable logic device.
仿真计算和道路试验均表明经过集成控制和集成优化设计后，汽车的行驶平顺性和操纵稳定性等综合动力学特性得到了改善。
The effectiveness of the proposed simultaneous optimization method to improve ride comfort and handling stability of vehicles is proved by theory analysis, simulation and test.
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