一种模拟乘法器电路，其具有基于输入系数电压的频率响应调整。
An analogue multiplier circuit has an input coefficient voltage dependent adjustment of its frequency response.
把乘法器系数表示为CSD形式，将常系数乘法优化为最少的移位加操作。
Coefficients of the multipliers are transformed into CSD forms and the multiplications are substitute by minimum shift-add operations.
应用推荐