本文介绍了一个专门面向网络协议处理的硬件多线程包处理微引擎NRS05的设计。
This paper proposed a packet processing engine architecture called NRS05, that promotes the efficient dynamic thread scheduling for hiding long latency operations and coping with pipeline stalls.
网络处理器以高度并行、硬件多线程、多级存储和灵活可编程等先进技术提供高速的数据包处理性能。
Network processor can analyze packets in parallel mode and shorter inner latency by using hardware threads, multi-level memories, and obtain flexibility by using programmable components.
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