模拟结果显示：越细长的沟道，器件的短沟效应越弱，器件的亚阈值斜率随栅氧化层增厚而加大。
The simulated results indicate that thinner and longer channel can reduce short channel effects, while thicker gate oxide will lead to higher subthreshold slopes.
这种结构器件能有效降低困扰常规MOSFET的短沟效应和寄生的双极效应，能大幅度减小器件尺寸。
The device size can be greatly shrunk with effectively suppressing short channel effect and parasitic bipolar effect in conventional MOSFET.
本论文着重论述未来CMOS进入纳米尺寸的关键挑战，如：电源电压和阈值电压减小、短沟效应、量子效应、杂质数起伏以及互连线延迟等影响。
Key challenges on CMOS scaling down into nanometer regime are discussed, such as power supply and threshold voltage, short-channel effect, quantum effect, random doping distribution and wire delay.
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