通过实验，说明演化硬件技术确实在电路自动设计方面有着极大的前景。
From this experiment, we can conclude that evolvable hardware technology is promising in circuit automatic design.
VHDL硅编译器是XUECAD集成电路自动设计系统的一个辅助工具。
VHDL Silicon compiler is a supplementary tool of the IC CAD system-XUECAD.
基于演化算法技术，提出一种新的设计思想，实现奇偶校验器的电路自动设计。
Based on evolvable algorithm, this paper proposed a new method for parity check circuit design automatically.
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