本文针对实际维护PCB板中对含存储器模块的电路系统的测试需求，从测试角度对ROM和RAM建立一种复杂器件模型。
This paper aimed at testing requirement of digital circuits contain memory chips during maintaining PCB, proposes a complex component model of ROM and RAM from testing angle.
这种成品率模型可以扩充到包含更复杂的备用电路系统的芯片。
This yield model can be extended to chips containing more complex redundant circuitry.
为了研究不连续系统中的混沌行为，观察一个由比较器控制的，带有模拟开关的RLC非线性电路模型，此电路系统的行为可以用一个分段光滑映象来描述。
In order to study the chaotic behavior in the discontinuous system, a RLC nonlinear circuit model with an analogy switch was observed, which was described by a piecewise-continuous map.
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