输入失调电流是两个差动输入端的基极输入电流，当两个输入端的源阻抗不相等时，它可引起仪表放大器的失调误差。
Input offset current is the difference between the two input bias currents and this leads to offset errors in in-amps when source resistances in the two input terminals are unequal.
该芯片的判决电路采用SCFL(源级耦合晶体管逻辑)的D触发器结构，根据矢量叠加原理设计，采用差动电流放大器构成可调移相器。
The decision circuit of the chip is applied with a DFF using SCFL structure and its tuned phase shifter with differential current amplifiers according to the principle of vector addition.
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