介绍了在地下漏水探测仪中用CPLD实现高速音频数据采集控制及与单片机的接口逻辑设计。
The gathering and controlling of high speed data of audio frequency by CPLD and the logic design of interface are introduced for underground water leakage detecting instrument.
然后分别介绍控制电路和主电路设计原理与思路，重点论述了混合电平逻辑设计中的接口解决方案、A/D采样电路、SPI通讯接口电路及主电路的保护等；
The key points lies in interface resolve method in hybrid voltage-logic design, A/D sampling circuit, SPI communication port and the protect of the main circuit.
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