介绍了基于DVB - C标准的并行数据广播接收卡的整体设计及实现。其中着重于硬件部分的设计。
This paper introduces the entire design and realization of the parallel data broadcast receiving-card based on DVB-C standard, emphasizing on the realization of hardware.
在串并转换接收器中，并行数据在字节时钟的作用下并行输出。
In the deserializer, parallel data are clocked out by byte clock.
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