采样保持电路设计采用了电容下极板采样技术，不仅有效地避免了电荷注入效应引起的采样信号失真，而且消除了时钟馈通效应的不良影响。
The sample and hold circuit is employed by the bottom plate sampling technique, which could not only cancel the charge injection error but also eliminate the effect of clock feed-through.
为管理芯片产生复位输入，其输入必须接收低有效的地信号，需要晶体管q 1导通。
To create an reset input to the supervisory chip, its input must receive an active-low ground signal, requiring transistor Q1 to turn on.
针对软件无线电(SDR)技术中的多频段信号带通均匀采样技术，提出了一种能够高效、准确地求解最小采样频率的方法。
An efficient method is presented to find the minimum valid sampling frequency for bandpass sampling of multiband signals in software defined radio (SDR) technology.
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