该第二平板电极形成于该介电蚀刻停止层上，且大致的与该第一平板电极平行且相重叠。
The second plate electrode is formed above the dielectric etch stop layer, and is approximately in parallel with the first plate electrode, and overlaps the first plate electrode.
一第一层间导电接孔形成于且穿过一层间介电层以及一介电蚀刻停止层。
A first interlayer conductive joint hole is formed on and through an interlayer dielectric layer and a dielectric etch stop layer.
该第一平板电极形成于设于该介电蚀刻停止层下的一第二内连接结构之上。
The first plate electrode is formed on a second inner connection structure provided under the dielectric etch stop layer.
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