本文介绍了当今RF设计的主流工艺，并分别对基于硅的深亚微米cmos工艺在RF设计中的可行性和困难进行了研究，评述了其中存在的问题。
This paper presented the various technologies in RF design and explored the feasibility and difficulties of deep sub micron CMOS RF design. And problems associated are also discussed.
亚微米垂直硅墙的制备是垂直硅薄膜耦合约瑟夫逊结的关键工艺。
The fabrication of submicron vertical silicon screen is a key step for fabricating Josephsonjunction coupled by vertical silicon membrane.
DSOI器件的衬底热阻和体硅器件非常接近，并且在进入到深亚微米领域以后能够继续保持这一优势。
The thermal resistance of DSOI devices is very close to that of bulk devices and DSOI devices can keep this advantage into deep sub-micron realm.
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