The input bit rate and the output frame rate of video decoder is fix, so a Rate Buffer is needed to balance this rate difference.

而经解码后显示的侦速率是恒定的，这就要求在解码端有一个缓冲器来实现输入码率与输出码率间的过渡。

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The driving component includes: a N-bit serial buffer, a K-bit extension buffer, a N-bit video data buffer and N driving current output ports.

该驱动元件包括：一N个位的串序缓冲器，一K个位的延伸缓存器，一N个位的影像资料缓存器，N个驱动电流输出端口。

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Simulation result shows that the buffer control strategy can not only predict the video coder's output correctly, but also adapt the scene changes in video, get similar decoded image quality.

模拟结果表明，此项缓存控制技术不仅能准确预测编码码率，而且能自适应视频的场景变化，使解码图像质量比较均匀。

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