The results of simulation suggest that the designed FK-LSCDFF has correct logic function, and reduces 17% powedissipation compared with conventional low-swing clock double-edge-triggered flip-flop.
模拟结果表明所设计的触发器具有正确的逻辑功能，跟传统的时钟低摆幅双边沿触发器相比，降低近17%的功耗。
He accidentally found that the desk clock did not swing its pendulum.
他无意中发现座钟不摇摆了。
Using binary notation, 26 movable bit levers inside each bit serial adder convert the swing from the pendulum into a visible notation on the clock.
使用二进制表示法，在每个26位串行加法器动产位的杠杆转换成一个钟摆在摆动的时钟可见符号。
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