In this paper, a hardware-oriented, full pass-parallel coding architecture is presented, based on only one scanning window. This architecture is verified on FPGA.
该文设计出一种适用于硬件实现的单窗口全通道并行编码结构，目前已通过FPGA验证。
To significantly speed up the pass-parallel based entropy coding, a novel real-time rate control algorithm was proposed.
为了提升基于码通并行的熵编码速度，提出了一种新的实时码流控制算法。
After the detailed analysis of EBCOT algorithm and pass-parallel coding technique, a dual context window bit-parallel coding method and its architecture for hardware implementation are proposed.
通过研究EBCOT编码原理和通道并行算法的编码过程，提出了双上下文窗口位并行的EBCOT系数位建模方法，详细说明了使用该算法的系数位建模系统的硬件结构。
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