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operand isolation

  • 操作数隔离

专业释义英英释义

  • 操作数分离 - 引用次数:2

    At the RTL level, the clock gating logic and operand isolation logic are inserted by Design Compiler to further reduce the power consumption.

    在将逻辑设计综合成门级网表时,通过设置Design Compiler软件自动插入门控时钟逻辑和操作数分离逻辑来降低功耗。

    参考来源 - LCD控制器中低功耗设计方案的研究
    操作数隔离 - 引用次数:1

    参考来源 - LCD控制器中低功耗设计方案的研究

·2,447,543篇论文数据,部分数据来源于NoteExpress

Operand isolation

  • abstract: In electronic low power digital synchronous circuit design, operand isolation is a technique for minimizing the energy overhead associated with redundant operations by selectively blocking the propagation of switching activity through the circuit.

以上来源于: WordNet

双语例句

  • This flow could use the gated clock, the operand isolation and the gate level optimization to decrease the power consumption without changing the original design.

    这种综合流程改变原有电路设计的前提下同时采用时钟操作隔离功率优化降低功耗。

    youdao

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