The traditional magnitude comparator is based on gate-level techniques and not suitable for VLSI design.

传统的数字比较器采用门级设计技术，电路结构不规则，不利于大规模集成电路的设计。

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The measure sub-element , the phase-comparator , and the power level are introduced.

对检测环节、鉴相器、功率级做了介绍；

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