(6)版图验证(Layout Verification)。版图设计完成以后进行版图验证，主要包括版图原理图比对(LVS)、设计规则检查(DRC)和电气规则检查(ERC)。
基于10个网页-相关网页
Post Layout Verification 绕线后的电路功能验证
Hierarchical Layout Verification 层次版图验证
vlsi layout verification vlsi版图验证
According to the analysis of IR_drop, a reasonable power network is designed in Powerplan to eliminate the violation of IR_drop. All the methods, which can eliminate the Antenna Effect, are used in P&R and layout verification.
基于上述研究分析,结合实际项目,在逻辑综合、自动布局布线过程中采取相应措施减小串扰引起的设计违规;利用IR_drop分析结果,在电源规划阶段设计科学的电源网络,使得设计没有IR_drop违例;利用消除天线效应的办法,在布线和版图验证阶段消除天线效应。
参考来源 - 超深亚微米IC后端设计中关键技术研究At last, the process technology and layout verification are introduced roughly.
在论文的最后,简单介绍了该芯片设计所选用的工艺与版图验证。
参考来源 - 一款计算机ATX半桥开关电源的设计与实现·2,447,543篇论文数据，部分数据来源于NoteExpress
An efficient network comparison algorithm for layout verification of integrated circuits is presented.
提出了一种有效的验证集成电路版图的网络比较算法。
The basic theory of resistance extraction in VLSI layout verification is described. A novel resistance extractor based on the boundary element method is presented.
介绍了VLSI版图验证中电阻提取的基本原理和主要方法，给出了一种新颖的基于边界元法的电阻提取算法。
The back-end design includes layout design and verification, but they will not be discussed in this paper.
而集成电路的后端设计包括了版图设计和验证，它们不在本论文的讨论范围之内。
应用推荐