This paper introduces VHDL and its feature briefly. At meantime, it describes high level synthesis and high level simulation technology in detail.
本文简单介绍了VHDL硬件描述语言及其特色，并就高层次综合、高层次仿真及验证等技术的主要功能和特点，作了较为详细的描述。
With appropriate tool support, designers could perform execution or simulation and debugging on high-level system models to validate and verify system logic early on.
有了适当的工具支持，设计人员可以在高层的系统模型上进行执行或模拟，并调试，从而在早期确认并验证系统逻辑。
His team is using the simulation to try to understand the brain's high-level computational principles.
他的团队通常用这类模拟来理解大脑的高级计算规则。
应用推荐