...；低功耗设计；多时钟系统；哈佛结构；流水线结构 [gap=709]Key Word: microcontroller; low power design; multi-clock system; Ha Vard structure; under pipeline ...
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asynchronous multi-clock system 异步多时钟系统
The asynchrony FIFO module can be applied in the other asynchrony interface circuit design in multi-clock system.
异步fifo的设计方案对于多时钟系统中异步接口电路的设计具有一定的参考价值。
In this paper, multi-function digital clock system design.
本文介绍了多功能数字钟的系统设计。
First, aiming at the distribution of NCS, specially the multi-master system such as CAN, there is no unified network clock, so the scheduling and management are affected.
首先针对网络控制系统分布式的特点，特别是类似于CAN总线的多主系统，由于没有单一的时钟提供同步机制，影响调度管理的同步。
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