LPL Low Power Logic 小功率逻辑
low-power logic [计] 低功率逻辑
low-power logic circuit 低功率逻辑电路
low power logic gate 低功率逻辑门
Advanced Low Power Schottky Logic 特基型
Low Power Transistor-Transistor Logic 低功耗晶体管 ; 低功率晶体对晶体逻辑
low voltage power logic 低电压功率逻辑
The results of this work show that non-planar, multi-gate device architecture is an effective way to improve the scalability of III-V QWFETs for low power logic applications,’’ according to the firm.
本文显示立体型多栅结构可有效提升低功耗逻辑用III-V族QWFET管子的尺寸缩微能力。
To erase redundancy of the clock, improve clock utilization rate and reduce power dissipation, this paper proposes the logic design of low power flip-flop based on double edge trigger.
从消除时钟冗余，提高时钟利用率以达到降低功耗的思想出发，提出基于双边沿触发的触发器的逻辑设计。
This dissertation detailedly investigate the symbolic logic and some typical techniques for low power FSM logic synthesis and optimization.
论文详细讨论了低功耗有限状态机综合与优化中的符号逻辑和一些典型方法。
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