Then a detailed ASIC design of the SHA-1 algorithm module is given, whose logic on the longest critical path is optimized.

随后给出了SHA - 1算法模块的详细ASIC设计，优化了SHA - 1模块最长关键路径上的逻辑结构。

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The results indicate that "the longest covered-time" routing algorithm can improve the system performance compared with "the shortest path" one.

结果表明：“最长覆盖时间”算法与“最短路径”算法相比，能更有效地改善系统的性能。

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MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%.

对MCNC 标准单元测试电路中组合和时序电路的实验结果显示， 电路经过时延驱动优化布局后的最大路径时延最多减少了31%。

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