线路布局精简,差动输入级 (Differential Input Stage) 选用J-FET作放大组件,纯A类放大,输入至输出直接交连,由于零件配对精确,失真大幅降低,频带宽广,由DC至耳闻之外。
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The bias module provides a bias current to the differential input stage.
偏压模块提供偏压电流至差动输入级。
The output buffer includes a differential input stage, a bias current source, a feedback module, and an output stage.
输出缓冲器包括差动输入级、偏压电流源、反馈模块以及输出级。
For this, I adopt the new differential input stage to make input common mode range enlarged, and as far as possible not reduce its gain.
为此,采用了新的差分输入级,使共模范围增大,同时尽量不减少差分输入级的增益。
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