The access rate of the memory is determined by crucial path which is between data input and data output.
静态存储器的存取速度由地址输入到数据输出的关键路径决定。
To live in a pipeline, a utility needs to read data from standard input and write data to standard output.
为了生活在管道中，实用程序需要从标准输入读取数据，然后向标准输出写出数据。
They are forms input, processed data and data output.
它们是表格输入、处理的数据，和数据输出。
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