集成电路(VLSI)设计流程中,设计规则检查(DRC)是关键一环。
In VLSI design flow, design rule checking (DRC) is an important step.
本文给出了一种基于设计规则检查之上的一维版图压缩算法——局部的动态的一维压缩算法rdoc。
Regional Dynamic One-Dimensional Compaction Algorithm (RDOC) based on design rule check is given in this paper, which is very suitable for physical layout.
然后也检查了我们是否打破了我们在项目中所使用平台的设计规则。
The latter were asked to check that we did not break any system design rules valid on the platform we were using for this project.
应用推荐