这是因为进程执行现在需要跨总线协调,以一半的芯片时钟频率进行处理。
This is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.
JW认为下一个十年将会兴起的另一个架构是,连接企业资源到云的网络是一个单芯片上的总线。
Another architecture, that JW sees coming in the next 10 years is the one where "the network connecting enterprise resources to the cloud is a bus on a single chip."
增强的总写架构-目前64位芯片上的总线架构比前几代更加的快也更加的广。
Enhanced bus architecture - The bus architecture on current 64-bit chipsets is faster and wider than earlier generations.
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