本论文设计了高速线阵CCD的驱动电路，并采用相关双取样的方法消除噪声。
The paper design a driving circuit of high speed linear CCD, and adopt correlation double sampling method to decrease the noise.
电路采用电容负反馈互导放大器(CTIA)及相关双取样(CDS)结构，有利于减小电路的噪声。
The adoption of capacitor feedback transimpedance amplifier (CTIA) and correlated double sampling (CDS) structure helps to reduce the noise of the circuit.
该电路的模拟部分包括电荷放大器、后级放大电器、相关双取样与采样保持电路、积分器、单位增益缓冲器。
The analog part includes self-test circuit, charge amplifier, post-amplifier circuit, CDS and S/H circuit, integrator, unity gain buffer.
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