数字锁相环频率合成器 Tuning method Digital PLL synthesizer 的全数字锁相环 alldigital phase locked loop 全数字式锁相环 all digital phase-locked loop ; Locked Loop ; ADPLL ..
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本文介绍一种实用的全数字锁相环方案。
This paper introduces a practic design version of all-digital PLL.
本文讨论的全数字锁相环包括过零检测器和环路滤波器。
This paper discusses an all digital phase-locked loop with a zero-crossing detector and a loop filter.
重点研究了基于FPGA的全数字锁相环频率跟踪技术和数字化SPWM实现技术。
All digital Phase-Locked Loop frequency tracking and digital SPWM realization technology based on FPGA are emphasized in the research.
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