提出了一种建立数字门电路宏模型的方法 ，采用该方法建立的门电路宏模型可以对门电路以及由门电路构成的数字电路进行逻辑仿真 。
The said digital gate circuit macro model can be used to perform a logical simulation for gate circurit and the digital circuit formed by the gate circuit.
此文提出了一种在SPICE中建立数字电路宏模型的新方法。
This article proposed a new kind of method to develop the digital circuit Macro-model in SPICE.
研究从RTL级分析数字电路的功耗。 应用信息论中熵的概念计算由VHDL描述中抽象出的电路模型的功耗，并考虑输出之间的相关。
To estimate the power consumption of digital circuits from RTL, a model abstracted from VHDL description is estimated by entropy from information theory, considering correlation of outputs concerned.
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