世界各国的研究结果表明，并行离散事件模拟在提高模拟速度上表现出较大的潜力。
The study results indicate that parallel discrete event simulation(PDES) has remarkable potential in improving the simulation speed.
随着大规模集成电路的复杂性日益增加，逻辑模拟开始采用并行离散事件模拟技术。
With the rapid growth of complexity of VLSI, more and more logic simulation has adopted parallel discrete event simulation.
基于时间偏差的并行离散事件模拟是提高模拟速度的有效手段，其通用系统实现结构是分布式逻辑进程模拟结构。
Parallel discrete event simulation based on TW is an effect method to improve the speed of simulation, it's common implementation structure is distributed logic process structure.
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