A variable step uniform quantization(VSUQ) sum-product algorithm(SPA) was developed to reduce the hardware complexity of low-density parity-check(LDPC) code decoding.
为降低低密度奇偶检验码译码的硬件实现复杂度，提出了一种可变步长均匀量化“和积”译码算法。
Error control can be done in any step such as prediction, transform, quantization, VLC, bitstream syntax structure, channel coding, decoding and etc.
差错控制可以在信源编码和信道编码的各个环节进行，如：预测、变换、量化、可变长编码、比特流结构、复用以及解码等。
The special video processing modules include a motion compensation unit (510), means (512) for performing IDCT and inverse quantization, an entropy decoding unit (513) and a filter unit (515).
专用视频处理模块包括运动补偿单元 （510）、用于执行IDCT和反量化的装置（512）、熵解码单元（513） 以及过滤单元（515）。
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