With the increase of system integration and application demands, more and more digital and analog modules are embedded in a single chip.
随着系统集成度和应用需求的增加,越来越多的数字模块和模拟模块内嵌在同一芯片中。
This is a single-chip development and electronic design documents for the conversion analog and digital information.
这个是一个单片机开发和电子设计的文档,用于模拟与数字转换的资料。
To reduce the power dissipation and chip size of digital calibration circuits of pipelined analog-to-digital converter (ADC), a new statistics-based background calibration technique is presented.
为了降低流水线模数转换器中数字校准电路的规模和功耗,提出了一种新的基于信号统计规律的后台数字校准技术。
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