利用电容耦合，而不是开关逻辑网络进行逻辑求值，相对减小了导通电阻和绝热损失。
The ERCCL logic is not implemented through a switch logic network but through capacitance coupling, which reduces its turn-on resistance and adiabatic losses.
根据单电子系统半经典模型，采用蒙特卡罗法单电子模拟程序对电容耦合的类CMOS单电子逻辑单元在不同参数条件下的转移特性进行数值模拟。
According to the semi classical model, the transfer characteristics of CMOS type single electron digital logic cells were analyzed by the Monte Carlo simulation.
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