标准逻辑单元，存储电路设计及输入输出单元设计。

Standard logic cells, memory design and IO cell design.

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标准逻辑单元，存储电路设计及输入输出单元版图设计。

Standard logic cells, memory design and IO Layout design.

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此门阵列采用的BFL预功能级标准逻辑单元，具有九种组合逻辑功能及两种不同选择的驱动能力，并具有输出电平调节功能。

The pre-functional cell of standard buffered FET logic (BFL) adopted by the gate array possesses nine logic functions, two different kinds of driving capabilities, and the level control ability.

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