研究人员有机会调整和改造代码并优化程序，从而让更多的处理器、更多的核和 Blue Waters 的新型互连线路发挥作用。

Researchers have a chance to tune and port their code and optimize their programs to use more processors, more cores and Blue Waters’ new interconnect to their advantage.

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评测表提供为特定的处理器事件收集的采样的百分数或数量，比如高速缓存线路故障的数量、传输后备缓存(TLB)故障的数量，等等。

The profiling table provides the percentage and number of samples collected for specified processor events such as the number of cache line misses, Transition Lookaside Buffer (TLB) misses, and so on.

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一个连接处理器与所有外设的，用来通讯的电子线路集。

A set of electrical lines connected to the processor and all of the peripherals withwhich itcommunicates.

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