细胞执行逻辑或其他电子功能使用特定的集成电路技术。
Cells implement logic or other electronic functions using a particular integrated circuit technology.
数字集成电路测试内容包括逻辑功能测试、直流参数测试和交流参数测试。
Digital IC test content includes logic functional test, test of DC parameters and test of AC parameters.
选择信号的逻辑状态可以例如响应于集成电路的温度变化而改变。
The logic state of the select signal can be changed, for example, in response to a change in the temperature of the integrated circuit.
CPU包含成千上万个晶体管和逻辑电路，它们被封装在一个很小的设计空间模式，称为集成电路(IC)。
The CPU contains thousands of transistors and logic circuits packaged in a very small design known as an integrated circuit (IC).
数字逻辑门电路作为集成电路被制造：所有组成的晶体管和电阻建立在一块半导体材料上。
Digital logic gate circuits are manufactured as integrated circuits: all the constituent transistors and resistors built on a single piece of semiconductor material.
有了集成电路计算机不但算得更快，而且从某种意义上说更聪明了。由于装的记忆和逻辑装置更多了，所以它们可以从事更难的工作。(不能译为“较”)。
Computers with Ics not only were faster but were in a sense much smarter. Crammed with more memory and logic circuity, they could take on far more difficult workloads.
双稳态触发器是具有记忆功能的核心逻辑单元，在数字集成电路中发挥着重要作用。
Stable state trigger is core logical unit which has memory function and plays an important role in digital integrated circuit.
提出一款基于大规模可编程逻辑器件设计的具有多种功能的电力电子设备通用脉冲发生专用集成电路(ASIC)。
This paper presents a general pulse generator application specific integrated circuit (ASIC) for power electronics devices designed with the large-scale programmable logic devices.
随着集成电路集成度的提高，逻辑函数的综合也更为复杂。
As the integrated circuit density is getting higher, logical function and its synthesis are also getting more complex.
介绍用中规模数字集成电路设计组合逻辑电路的原理和方法。
In this article, the method and theory of designing composite logic circuit by using middle scale digital integrated circuits is discussed.
介绍了用中规模集成电路数据选择器实现组合逻辑函数的三种方法：常用方法、扩展法、降维法。
This paper introduces three methods to realize composite logic function with medium - scale data selector: the common method, the expanding method and the dimension - reducing method.
在一个实施例中，架构事件通常可以指在与处理器相同的集成电路芯片上呈现的处理资源或其他逻辑内出现的事件或条件。
In an embodiment, an architectural event may generally refer to an event or condition that occurs within processing resources or other logic present on the same integrated circuit chip as a processor.
复杂可编程逻辑器件(CPLD)是目前应用最为广泛的可编程专用集成电路(ASIC)之一，特别适合于数字系统的设计和开发。
Complex Programmable Logic Device (CPLD) is one of Application Specific Integrated Circuit (ASIC) that has been widely used, especially adapt to design digital system.
采用CMOS集成电路完成主控逻辑单元，结合斜井人车的运行特点，对实现保护的各环节进行了综合阐述。
The CMOS integrated circuit is applied to form the main control logic units. The links of protection realization are expounded in the light of the running characteristics of man-riders.
提出以电流信号表示逻辑值的新型低噪声触发器设计，用于高性能混合集成电路的设计中以减少存贮单元开关噪声对模拟电路性能的影响。
Some new low-noise edge triggered flip-flops are presented, and their logic levels are realized in the current domain by steering a constant dc bias current.
小型集成电路通常是最基本的逻辑栅门。
在工程实践中利用中规模集成电路设计组合逻辑电路需要在设计理念和方法上做一定的改进，以适应工程设计计算机化和工程实际的要求。
It needs to have new ideas and ways in design to use Mid-scale integrate circuit to improve the Combined Logical circuit in engineering to meet the requirements of computerizing engineering design.
一种开始于1964年左右并使用逻辑电路技术组件(集成电路)的计算机。
A computer that began in about 1964 and USES logic technology component (integrated circuit).
可编程逻辑器件集成电路包含被按可编程核心逻辑电源电压供电的可编程核心逻辑。
The programmable logic device integrated circuits contain programmable core logic powered at a programmable core logic power supply voltage.
描述了使用可重新配置逻辑器件对集成电路或电模块的低成本测试。
Low cost test for integrated circuits or electrical modules using a reconfigurable logic device is described.
过滤器逻辑结构的模块化特别适宜用标准单元法来实现ASIC(专用集成电路)的版图设计。
The modularization of filter logical architecture is especially suitable for layout design of ASIC with standard cell.
对于那些能接触到可编程逻辑器件的人而言，需要的集成电路的数目大大的降低了。
For those who have access to programmable logic devices, the number of integrated circuits required can be greatly reduced.
“黏合逻辑”是通过小型和中型集成电路把不同数字芯片的协议和总线连在一起。
Glue logic meant the small - and medium-scale integrated circuits that "glued" together the protocols and buses of the various digital chips.
分析了CMOS逻辑门电路在运行时的电流特征，阐明了集成电路中数据与电磁辐射的相关性，建立了寄存器级电磁信息泄漏汉明距离模型。
The result shows that EM information leakage exists in CMOS integrated circuit during work, XOR operation in each round of DES is an attack point.
双列塑封的信号处理集成电路BY 139平均失效率达到10.8%，方形陶瓷封装的逻辑控制电路PC 11平均失效率达到2.5%。
The average failure rate of signal processing molectron BY139 was 10.8%. And the average failure rate of logical controlling molectron PC11 was 2.5%.
随着大规模集成电路的复杂性日益增加，逻辑模拟开始采用并行离散事件模拟技术。
With the rapid growth of complexity of VLSI, more and more logic simulation has adopted parallel discrete event simulation.
综合作为逻辑设计和物理实现之间的桥梁，在现代集成电路设计中发挥了越来越重要的作用。
The main contents and works in this paper include:As the bridge which links logic design and physical implementation, synthesis is becoming more and more important in modern IC design.
可编程逻辑器件是一种用户根据需要而自行构造逻辑功能的数字集成电路。
The programmable logic device is an IC that could be structure function by user himself.
一种集成电路，包括多个逻辑元件(LE)和一个部分扫描寄存器，每个逻辑元件具有多个输出。
An integrated circuit is described as comprising a plurality of logic elements (LEs), each of which having a plurality of outputs, and a partial scan register.
提出基于划分的逻辑图布图策略，有效解决超大规模集成电路(VL SI)逻辑原理图自动生成中规模与速度的矛盾，给出详细的划分模型。
Presents a layout strategy based on partitioning, that can efficiently solve the problem of automatic generation of logic schematics for VLSI.
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