第二锁存电路锁存所述第一和第二电压信号，并且响应于第三控制信号而输出第二输出信号。
A second latch circuit latches the first and second voltage signals and outputs a second output signal in response to a third control signal.
第一锁存电路锁存所述第三和第四电压信号，并且响应于该第二控制信号而输出第一输出信号。
A first latch circuit latches the third and fourth voltage signals, and outputs a first output signal in response to the second control signal.
每个器件都有一个八位CMOS移位寄存器和CMOS控制电路，八个CMOS数据锁存，八个双极电流吸收达林顿输出驱动器。
Each device has an eight-bit CMOS shift register and CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sinking Darlington output drivers.
所述动态锁存器适于至少部分基于输入数据信号产生放大的输出数据信号。
The dynamic latch is adapted to generate an amplified output data signal based at least in part on the input data signal.
在一些实施例中，所述电平位移电路包括锁存经转换的输出信号的电平位移锁存器(208)。
In some embodiments, the level shifting circuit includes a level shifting latch (208) that latches a translated output signal.
锁存电路可被配置为锁存在输出节点处生成的输出数据信号。
The latch circuit may be configured to latch an output data signal generated at the output node.
文中提出了一种用于PWM控制器的比较器输出电路的设计，该电路基于电流模式控制，能够同时对三路输入信号进行比较输出并对输出信号进行锁存。
A comparator circuit based on current-mode control used in PWM controller is presented that is able to compare 3-data at a time and latch output signals.
在A1210 - A 1214霍尔效应锁存包括一个单一的硅芯片上以下内容：稳压器，霍尔电压发生器，小信号放大器，施密特触发器和NMOS输出晶体管。
The A1210-A1214 Hall-effect latches include the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS output transistor.
在A1210 - A 1214霍尔效应锁存包括一个单一的硅芯片上以下内容：稳压器，霍尔电压发生器，小信号放大器，施密特触发器和NMOS输出晶体管。
The A1210-A1214 Hall-effect latches include the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS output transistor.
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