本实用新型公开一种时钟同步倍频电路，尤其涉及电路设计和可编程逻 辑器件设计中时钟倍频电路。
The utility model discloses a clock synchronized frequency multiplication circuit, in particular relating to clock synchronized frequency multiplication circuit in circuit design and PLC design.
本论文的任务是设计并实现基于FPGA及数字倍频技术的集成保护中数据同步采集系统。
The thesis presents the design and realization of a data synchronous acquisition system in integrated protection based on FPGA and digital frequency multiplying technique.
介绍了利用DSP和MAX115构成的系统对光栅传感器的两路输出信号进行高速同步采集，以及对光栅信号实现200倍频的软件细分方法。
Measure of simultaneous-sampling two channel signals sent from grating sensor, and soft-subdividing of moiré fringes in 200 based on simple system composed of DSP and MAX115 were introduced.
在次同步谐振发生的时间内，弯振谱图上二倍频成分消失，工频成分的幅值变小。
From frequency diagram of flexural vibration, it is revealed that the vibration amplitude of 1X frequency decreases and that of 2X frequency disappears.
在次同步谐振发生的时间内，弯振谱图上二倍频成分消失，工频成分的幅值变小。
From frequency diagram of flexural vibration, it is revealed that the vibration amplitude of 1X frequency decreases and that of 2X frequency disappears.
应用推荐