介绍了二总线通信基本原理，并给出了基于二总线结构的监测系统的构成。该监测系统已在军事领域中得到应用。
Two line communication is introduced, and the two line communication system for surrounding monitoring is developed. The two line communication system was used in military.
如果还有二级总线，比如pci总线，那么将它们也考虑在内。
If there are secondary buses, such as a PCI bus, consider them also.
您可以将一个用于将来自外部客户端的请求纳入总线，并且将第二个用于来自内部客户端的请求。
You can use one for requests coming from external clients into the bus, and the second one for requests coming from internal clients.
第二部分：业务需求和总线。
第二步：创建总线目的地
在本系列文章的第二部分，我们将会为您示范怎样开始着手普通场景，设置总线和目的地，并且使用JMS连接总线。
In Part 2 of this series, we will show you how to get started with a simple scenario, setting up a bus and a destination, and using JMS to connect to the bus.
概念二：485总线能够带128台设备进行通讯。
Concept two: the 485 bus can communicate with the 128 devices.
在第二部分中，我们介绍了关于需求的业务场景，需求会导致构建企业业务总线，也会完成创建“总线”实例的步骤并且为了使其用在Web服务上而进行设置。
In Part 2, we present a business scenario with requirements that lead to building an ESB, and also cover the steps to create an instance of the "bus" and set it up for use with Web services.
一个存储器地址是由输出到适宜的总线上的二进制数据所组成。这个总线我们称为地址总线。
A memory address consists of binary data being output on an appropriate bus which we call the address bus.
第二章阐述网络式仪器总线硬件平台的设计。
In chapter two, describes hardware system design of the network-stye instrument bus.
X9241采用二线串行i2c总线与单片机传递数据。其软件由主程序、中断子程序组成。
Data between X9241 and SCM is transmitted with I2C Bus, and the software includes main program and interrupt subprogram.
介绍了M - BUS二线制总线，它是一种用于远程仪表读取数据的欧洲标准，主要用于耗能测量仪表。
The M-BUS, the two wire bus, is the European standard for remote instrument data readout system. It mainly used for energy consumption meters.
为了便于获取指令，处理器把需要的由二元数据构成的地址存储在外部处理机总线的序列里面。
To carry out a fetch, the processor places the binary-code address of the desired location onto the address lines of the external processor bus.
介绍了上海通用别克GL型轿车二级串行数据总线的工作原理，论述了其一起数据传输特殊故障的诊断与排除。
The operation principle of two-stage serial data bus for Shanghai GM Buick GL car was introduced in this paper, a special trouble diagnosis and shooting was also discussed.
图2 - 8。在一个二级总线上对于一个设备的读请求的流程。
Figure 2-8. The flow of a read request for a device on a secondary bus.
从计算机体系结构观点，提出一个STD总线工控机二模容错计算机系统。
This paper presents a STD bus double modular fault-tolerant computer system based on computer architecture.
OPC规范和IEC 61499标准在现场总线控制系统中均属于用户层协议，二者都基于组件技术。
OPC specifications and IEC 61499 standard both are protocols of User Layer of FieldBus Control System(FCS), and both are based on software component technology.
I2C总线是一种用于IC器件之间连接的二线制总线，在嵌入式系统中有广泛的应用。
I2C bus is a kind of 2-wire bus for inter-connecting the IC instruments, and widely used in embedded systems.
使用肖特基二极管d1和D2，而不是普通二极管，为的是减少总线上低状态电压，改进噪声极限。
Using Schottky barrier diodes for D1 and D2 rather than common diodes reduces the low-level voltage on the bus, improving the noise margin.
有轨电车为单节车辆，微机网络系统采用二级控制，不必采用编组运行车辆所采用的较复杂的列车总线。
Railroad car is single section car, so microcomputer network system adopts two-stage control, does not have to adopt intricate Train-Bus that adopted by organize into groups car.
第一级MMU条目可能包含一个无效的条目或它包含了2 第二级页表的访问时，给出了一个的总线错误的地址。
The first level MMU entry may contain an invalid entry or it contains a 2nd level page table address that gives a bus error when accessed.
本系统主要包括GPS同步时钟和通信协议转换模块，二者之间通过RS- 485总线进行连接。
The GPS synchronous clock and the conversion devices are linked up with RS-485 bus.
总线这个术语指的是二进制数码在各种计算机部件之间传送的电子通道。
The term bus refers to an electrical pathway through which bits are transmitted between the various computer components.
在一个二级总线上对于一个设备的读请求的流程。
推入总线125的第二分支135可以占据96个时隙，其中每个时隙都为EMON计数器之一所保留。
The second branch 135 of the push bus 125 may take up to 96 time slots. , where each time slot is reserved for one of the EMON counters.
南桥DMA控制器支持二种方法经由PCI总线来处理传统的DMA，。
The DMA controller supports two separate methods for handling legacy DMA via the PCI bus.
第二章详细研究了EIB总线七层协议的规范，并通过一个测试对上述规范进行了验证。
Chapter 2 describes the 7-layer model of EIB protocol through a group of testing data on the bus.
所有型号有8 (2x4)M B缓存在第二级和系统总线的财经事务局1066兆赫。
All models have 8 (2x4) MB cache in the second level and system bus OF FSB 1066 MHz.
所有型号有8 (2x4)M B缓存在第二级和系统总线的财经事务局1066兆赫。
All models have 8 (2x4) MB cache in the second level and system bus OF FSB 1066 MHz.
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