为了让图像加速卡能够知道哪些输入寄存器应该载入哪些数据,就需要使用着色器声明。
In order that the accelerator could know what data should be loaded in each input register, shader declaration is required.
数据从四个寄存器收购成为可能读地址输入(RA1和RA0)。
Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0).
每来一个时钟脉冲,N位加法器将频率控制数据m与相位寄存器输出的累加相位数据相加,并将结果送相位寄存器输入端。
Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.
每来一个时钟脉冲,N位加法器将频率控制数据m与相位寄存器输出的累加相位数据相加,并将结果送相位寄存器输入端。
Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.
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