Interface driver, constraint, and timing rules, modeled using interaction or sequence diagrams.
接口驱动器、约束和计时规则，通过交互或时序图进行建模。
The method timing modification we examined in Part 4 can be a useful tool for isolating performance issues, but it really needs a more flexible interface.
我们在第4部分中分析过的方法定时修改对于隔离性能问题来说可能一个很有用的工具，但它的确需要一个更灵活的接口。
Following the philosophy of the task-focused interface, we have put all of the control in the users' hands, meaning that timing data is easy to adjust when reporting.
根据以任务为中心的界面的宗旨，我们将所有的控制权都交给用户，也就是说，工作时间数据在生成报告的时候是可以调节的。
For that purpose, POSIX libraries provide timing functions, such as gettimeofday, which give an easy-to-use interface to application programmers.
为了实现这个目的，posix库提供了一些与时间有关的函数，例如gettimeofday，它为应用程序开发人员提供了一个简单易用的接口。
This paper introduces the inside construction and applied method of DS12887, furthermore describes the hardware circuit for real-time timing and programmable method for interface software.
文章介绍了DS12887的内部结构和应用方法，以及由其构成的实时定时硬件电路和接口软件编制方法。
The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing.
根据PCI总线操作时序，提出了从设备接口控制器的有限状态机模型。
This power meter has various functions including accurate timing, interval management, power counting. Besides those, an infrared communication interface is provided as well.
该电能表有精确计时、分时管理、电量统计等功能，具有红外通信接口，可以通过手持红外抄录器对电能表进行数据读取、校准等操作。
The SDRAM has become the chief choice of the buffer storage because of its high speed, great capacity, and low price; but due to its complex control timing, it cannot directly interface with DSP.
同步动态随机存储器（SDRAM）具有高速，大容量，价格低廉等优点，因而成为缓冲存储器的首选，但是SDRAM控制时序比较复杂，不能与DSP直接接口，这极大地限制了它的广泛应用。
This paper discuss the design of the nice interface controller from interconnection strategy selection, interface protocol establishment and memory timing parameters.
本文从接口策略选择、接口协议制定以及存储器迟滞参数入手讨论如何设计性能优良的存储器接口。
Writing functional coverage models based on MAC frame length and type. Assertion is used to verify the timing of MII interface.
分析了MAC帧长度和类型的功能点，编写出功能覆盖率模型，并对MII接口时序进行了断言的验证。
The other is for I80 interface timing control.
另一个是用于I80接口时序控制的模块。
Interface and download chip is control-oriented and has complex clock relationships, therefore timing design is the key and difficult point.
自启动预载接口芯片以控制为主，时钟关系复杂。时序设计是整个设计的重点和难点。
The system utilizes CPLD to realize logical and timing control between DSP and multi-channel ADC. The interface between DSP's HPI and PCI bus is employed to achieve high-speed data transmission.
该系统采用CPLD实现了DSP与多通道adc的逻辑和时序控制，通过DSP的HPI与PCI总线接口设计实现了采集数据的高速传输。
Microprocessor via the control interface, according to some control timing sequence achieves control over FS9704.
微处理器通过控制接口、按照一定的控制时序实现对FS9704的控制。
We have examined the possibilities of both amplitude and timing errors corrupting audio data transmitted across an interface.
我们研究过这两个幅度和时间错误的腐蚀音频数据传输的接口上的可能性。
We have examined the possibilities of both amplitude and timing errors corrupting audio data transmitted across an interface.
我们研究过这两个幅度和时间错误的腐蚀音频数据传输的接口上的可能性。
应用推荐