This dissertation mainly studies the radar multi-waveform digital pulse compression processing system in frequency domain based on FPGA and multi-DSP.
本文主要研究基于FPGA和多片DSP的雷达多波形频域数字脉冲压缩系统及其软件设计。
An example of multi-DSP chips' parallel processing system is discussed in this paper, which consists of 20 TMS320C31 chips, and the frame of hardware and software design are discussed in the meantime.
本文介绍了以20片TMS320C 31芯片组成的多dsp芯片并行处理系统的设计实例，并给出了系统硬件组成和软件设计。
An example of multi-DSP chips' parallel processing system is discussed in this paper, which consists of 20 TMS320C31 chips, and the frame of hardware and software design are discussed in the meantime.
本文介绍了以20片TMS320C 31芯片组成的多dsp芯片并行处理系统的设计实例，并给出了系统硬件组成和软件设计。
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