• This part was not correct in that the input was not synchronised with the local clock.

    部分正确方面投入没有同步当地时钟

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  • Interface below the clock input to provide the most would like to say a word lover, so the other half in their tender moment in the warmth.

    时钟界面下方提供恋人输入最想一句话另一半时刻温馨自己柔情

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  • Based on the system clock and trigger input signals, using FPGA to generate trigger output signals in given working modes.

    通过FPGA实现一定系统时钟触发信号作用下各种工作模式的触发信号的产生

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  • The system use input clock as system clock and use parallel structure in system to provide flexible speed.

    系统采用输入数据的同步时钟作为系统时钟,系统内部采用全并行的方式,提供灵活速度

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  • The clocking circuit configured to provide the pull-up current to an internal node in response to a clock signal having the input supply voltage and the ground voltage.

    时钟电路被配置响应具有输入供电电压接地电压时钟信号内部节点提供电流

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  • Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.

    时钟脉冲,N位加法器将频率控制数据m相位寄存器输出累加相位数据相加,结果相位寄存器输入

    youdao

  • Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.

    时钟脉冲,N位加法器将频率控制数据m相位寄存器输出累加相位数据相加,结果相位寄存器输入

    youdao

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