Fully differential analog input stage.
完全差分模拟输入级。
Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges.
每个ADC均具有宽带宽、差分采样保持模拟输入放大器，支持用户可选的各种输入范围。
Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges.
每个ADC均具有宽带宽、差分采样保持模拟输入放大器，支持用户可选的各种输入范围。
The differential input is sampled at up to 40 MSPS by an analog modulator.
差分输入由模拟调制器以最高40MSPS的采样速率进行采样。
The two analog inputs can be configured as two single-ended inputs, one true differential input pair, or one pseudo differential input.
两个模拟输入可以配置成两个单端输入，一个标准差分输入（对）或一个准差分输入。
The two analog inputs can be configured as two single-ended inputs, one true differential input pair, or one pseudo differential input.
两个模拟输入可以配置成两个单端输入，一个标准差分输入（对）或一个准差分输入。
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