Building the transition relation of sequential logic circuit is one of the key technologies for applying model checking method to verify the sequential logic circuit.
有效地建立和表示时序逻辑电路的状态转移关系是应用模型检查方法验证时序逻辑电路的关键技术之一。
CMOS symmetrical three-valued ternary logic circuit was designed and fabricated, based on the information associated with symmetrical ternary logic combined with CMOS circuit processing features.
根据有关对称三进制逻辑的资料，结合CMOS电路生产工艺特点，设计并试制了对称三值逻辑CMOS系列电路。
This paper review elementary theory for new logic circuit with ROM memory array, and provide design method for two practical array logic circuit.
本文论述用ROM的存贮阵列构成新颖的组合逻辑电路和时序逻辑电路的基本原理，并给出两个实际的阵列式逻辑电路的设计方法。
A fluid logic sequential network can be classified as deterministic logic circuit and stochastic logic circuit.
流体逻辑时序线路分为确定型逻辑线路和随机型线路。
The race and hazard in the sequential logic circuit is quite essential and must be considered when designing logic circuit.
时序逻辑电路中的竞争冒险是电路设计中必须考虑到的重要方面。
The design is characterized in that when the chip of an EEPROM circuit is powered on, a read-out logic signal is generated through a self-generating circuit of a read-out logic;
该设计具体是，在EEPROM电路芯片加电时，通过一读出逻辑的自产生电路，产生一读出逻辑信号；
This kind of gate circuit can be used in forming 4 value combination logic circuit and order part logic circuit, it also can be combined with DYL series circuits.
这类门电路可以用于构成四值组合逻辑电路和时序逻辑电路，也可以和DYL系列电路配合使用。
This kind of gate circuit can be used in forming 4 value combination logic circuit and order part logic circuit, it also can be combined with DYL series circuits.
这类门电路可以用于构成四值组合逻辑电路和时序逻辑电路，也可以和DYL系列电路配合使用。
应用推荐