A timing verification research on the general processor used for communication and network is written in this dissertation.
论文对一个用于通信和网络的通用通信处理器的时序验证进行了研究。
Static timing analysis is widely applied in timing verification because of its high speed and great capacity. The gate delay computing is a critical part of static timing analysis.
静态时序分析由于速度快和容量大而广泛应用于时序验证，而门延时的计算则是静态时序分析中的关键部分。
Finally USES FPGA platform for BIST functions and timing verification, and through design compiler, static timing analysis, automatic placing and routing to achieve a BIST system layout.
最后利用FPGA平台实现了BIST的功能和时序验证，并通过综合、静态时序分析、自动布局布线实现了BIST系统的版图设计。
With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
通过建立SDH芯片验证平台和SDH芯片测试平台，实现IP软核的功能仿真、时序仿真和芯片性能测试。
Under pressure of the increase of chip scale and the decrease of timing to market, verification has become the bottleneck of digital IC design.
在芯片规模指数式上升和要求面市时间快速缩短的双重压力下，验证已成为数字集成电路设计的瓶颈。
In the project of HDTV channel receiving ASIC, DFT techniques based on scan-chains, STA (Static Timing Analysis) and formal verification has been adopted.
数字高清晰度电视信道接收芯片实现中使用了基于扫描链的可测试设计和静态验证技术。
The testing results of prototype indicate that the verification device can verify the projects, such as Clock Daily Error, Current Hour Error, Parking Timing Error, Charging Correctness.
样机测试结果表明，该装置能对检定规程所要求的时钟日差、当前时刻误差、停车计时误差、扣费正确性项目进行检定。
The testing results of prototype indicate that the verification device can verify the projects, such as Clock Daily Error, Current Hour Error, Parking Timing Error, Charging Correctness.
样机测试结果表明，该装置能对检定规程所要求的时钟日差、当前时刻误差、停车计时误差、扣费正确性项目进行检定。
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