An efficient SOC design lies on reusable IP cores.
有效的片上系统设计依赖于可复用的IP核。
A new scheme and the flow-process are given about the SOC design.
提出了一种新的SOC系统集成设计方法与流程；
This technique solves some questions of test control in SOC design.
从而解决了SOC测试中控制部分的一些问题。
However SOC design also meets many challenges, test reuse is one of them.
但SOC设计也遇到诸多挑战，测试复用就是其中的挑战之一。
Power estimation and optimization at high level is the key technology in SOC design.
在高层次对系统进行功耗估算和功耗优化是SOC设计的关键技术。
Recently more and more people have devoted the research of the methodology of SOC design.
近年来，SOC设计方法学的研究越来越引起人们的注意。
In this paper, the SOC design characteristics and mixed-mode testing of the BIST were discussed.
文中对SOC的设计特点及其BIST中的混合模式测试进行了探讨。
The reuse of multimedia processor IP core is the key and difficulty of programmable media SOC design.
媒体处理器IP核重用成为可编程媒体系统芯片设计的重点和难点。
Recently, reducing test application time and test data volume is a direction of effort in SoC design .
目前，减少测试应用时间和测试数据容量是测试领域的努力方向。
In chapter four, we discuss the criterion and design flow of a whole ASIC design and SOC design methodology.
第四章给出asic设计的规范和流程，以及最近流行的SOC设计方法学。
The advantage of SOC design is the reusable of IP. It can improve the efficiency of system development greatly.
片上系统设计的最大优点就是IP的可重用性，它可以极大提高系统开发效率。
The SOC design and implementation of the spacecraft system bus was studied, for example of the 1553b bus controller.
以1553 B总线控制器为例，采用SOC设计方法，研究了航天器系统总线的设计和实现。
IP kernel technique is a main technique in SOC design, and has been a hotspot and main tendency in the microelectronic design.
IP核技术是片上系统(SOC)设计的重要技术，已成为目前微电子设计的热点和主要方向。
With the video symbol generator design's instance, we have explored and demonstrated the new SOC design concept in avionics system.
并以视频字符发生器设计为例，对航空电子进行了SOC新设计概念的探索。
As the basic SoC design technique, the AHB bus interface design consists of master module interface design and slave module interface design.
AHB总线接口设计划分为主控模块接口设计及从模块接口设计。
In the SOC design, the hierarchical on-chip-bus architecture is usually adopted, and different IPs are integrated on different types of buses.
SOC设计通常采用层次化片上总线的体系结构，不同的IP集成在不同类型的总线上。
The first chapter summarizes the characteristics of digital TV and DVB specifications, and introduces the relating concepts of ASIC and SOC design.
第一章概述了数字电视和DVB标准的特点，并介绍了ASIC和SOC设计的有关概念。
The paper introduced the technology of IP Reuse, hardware and software co-design, SOC verification, measurement and low-power design on the SOC design.
介绍了SOC设计中的IP核可复用技术、软硬件协同设计技术、SOC验证技术、可测性设计技术以及低功耗设计技术。
Finally, relating to the trend of SOC design, the paper analyzes the IP reuse method, pointing the direction to improve the performance and reduce the cost.
最后结合SOC设计的趋势，分析了面向SOC设计的IP复用方案，为今后提高性能、降低成本指明方向。
SOC design technology comes into being under the trend of transition from IC to IS(integrate system), and now it has been becoming the mainstream of IC design.
设计技术，是在集成电路（IC）向集成系统（IS）转变的大方向下产生的，并已经逐渐成为IC设计的主流。
The last chapter studies the characteristics and methods of SOC design, and advances the scheme of byte processing part in DVB-S channel receiver for SOC design.
第八章研究了SOC设计的特点和方法，并讨论了面向SOC设计而实现DVB - S信道接收芯片字节处理部分的策略。
This paper introduces a method for realization of millions of SOC design, which is based on a physical prototype created during the earlier stage in backend design.
本文介绍了一种数百万门SOC设计实现的方法，它基于在后端设计过程的前期创建一个物理原型。
A reconfigurable Hardware Platform Based on SOC Design for Digital Protective Relay is presented. It combines the FPGA and the Flash MCU and related interface circuit.
文中提出了基于SOC的可配置微机保护硬件平台的设计方法和具体实现，该平台由FPGA和微处理器以及相关接口构成。
In this thesis, the interconnect model in the SOC design, and the delay, power and design method for layout design are investigated from the perspective of interconnect design.
本文主要针对SOC中的连线模型以及从连线设计角度对版图设计中的时延、功耗以及设计方法进行研究。
First of all, several methods about testing technology and design for testability and SoC test techniques are summarized.
首先对测试技术和可测试性设计的一些方法做出了综述。
How to select appropriate components to implement the design of the SOC is a difficult problem to solve.
如何选择合适的元件来实现系统芯片设计是目前面临的重大难题之一。
The second problem of test reuse is the design of SOC test architecture.
测试复用的第二个问题就是SOC测试结构设计问题。
The fast development of the semiconductor technology had push the design of SOC into network on chips (NOC).
半导体技术的飞速发展推动了片上系统设计进入到片上网络阶段。
The fast development of the semiconductor technology had push the design of SOC into network on chips (NOC).
半导体技术的飞速发展推动了片上系统设计进入到片上网络阶段。
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