Conventional transistors use a metal electrode, called the gate, to control the flow of electrons through a planar channel in the silicon substrate.
传统晶体管使用一个叫做“栅极”的金属电极，以控制电子在平面硅基片上的沟道中的流动。
This paper reports the design and experiments of the low noise UHF electronic tuner consisting of a low noise dual-gate FET and a high merit silicon epitaxial varactor.
本文叙述采用双栅砷化镓场效应晶体管和高优值硅外延变容二极管实现UHF电子调谐器低噪声化的有关设计和实验结果。
The reliability of strain silicon, gate dielectric and copper interconnection are discussed, and some new researches are presented.
简介了应变硅材料、栅介质的工艺及铜互连的可靠性，并对新的研究方向做了介绍。
The digital trigger to silicon controlled rectifier based on field programmable gate array (FPGA) has high accuracy and the ability of phase self-adjusting.
以现场可编程门阵列（FPGA）作为触发脉冲生成器，精确性高，并具有相序自适应性。
The technology will be based on a planar process with enhanced high-K metal gate (HKMG), novel strained silicon, and low-resistance copper ultra-low-K interconnects.
该技术将基于一个具有增强的高- k金属闸（HKMG平面工艺），新型应变硅，低电阻铜超低K互连。
Each chip is provided with conformal doped silicon glass layers which are covered on the silicon nitride layer and are covered on the gate structure and which have predetermined thickness.
每个所述芯片具有覆盖在所述氮化硅层和所述栅极结构上的具有预定厚度的共形的掺杂硅玻璃层。
Different site microstructure and mechanical properties of aluminum-silicon alloy in differential pressure casting process were investigated. The gate system was adopted vertical slitting gate system.
采用差压铸造工艺，研究垂直缝隙式浇注系统浇注的铝合金硅铸件不同位置的组织和力学性能变化。
Octal 3-state inverting bus transceiver. High-performance silicon-gate CMOS.
八路三态反相总线收发器。高性能硅栅cmos。
Octal 3-state noninverting bus transceiver. High-performance silicon-gate CMOS.
八路三态同相总线收发器。高性能硅栅cmos。
Presettable counter. High-performance silicon-gate CMOS.
预置计数器。高性能硅栅cmos。
The gated silicon field emitter arrays (FEA) with small gate aperture have been successfully fabricated by dry etching, including ion beam etching (IBE) and reactive ion etching (RIE).
利用离子束刻蚀(IBE)和反应离子刻蚀(RIE)等干法刻蚀方法来制造带栅极的场发射阴极阵列。
The gate dielectric layer is deposited using a plasma enhanced deposition with a gas mixture comprising a silicon and chlorine containing compound.
门电介质沉积层使用气体包括一个芯片和含氯化合物的混合物等离子增强沉积。
Silicon insulated-gate bipolar transistor (IGBT) technology is progressing, becoming better and cheaper.
硅绝缘栅双极晶体管(IGBT)技术在进步，成为更好和更便宜。
The gate electrodes (16) of the NMOS transistors (a) are formed in a layer of n-type doped polycrystalline silicon (14) without germanium.
NMOS晶体管(A)的门电极(16)在n -型掺杂的不含锗的多晶硅层(14)上形成。
On the other hand, it is essential to prepare high quality silicon nitride thin film for gate insulator layer of TFT in order to get excellent TFT.
与此同时，制备高质量的栅绝缘层用氮化 硅薄膜也是制备高性能薄膜晶体管（TFT）这一课题的需要。
On the other hand, it is essential to prepare high quality silicon nitride thin film for gate insulator layer of TFT in order to get excellent TFT.
与此同时，制备高质量的栅绝缘层用氮化 硅薄膜也是制备高性能薄膜晶体管（TFT）这一课题的需要。
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