After compared some structures of DAC, the segmented architecture of current-steering DAC is adopted. The 5 MSBS are thermometer code weighed and the 3 LSBS are binary-weighted.
通过对DAC结构的比较，决定采用分段式电流舵结构，其中高5位采用温度计码，低3位采用二进制译码。
This paper describes the design and the test results of a 7-bit high-speed CMOS DAC, which is implemented using a segmented architecture with 5 MSBs in unary way and 2(LSBs) in binary way.
介绍了一种高速7位DAC的设计及芯片测试结果，该DAC选取高5位单位电流源，低2位二进制电流源的分段结构。
The dissertation introduces the design of a 12-bit segmented current steering DAC based on data weighed average algorithm (DWA).
本论文着重阐述一种基于数据权重平均算法（DWA）的12位分段式电流舵型数模转换器的设计。
The dissertation designs a 12-bit "4-4-4" segmented current steering DAC.
本文设计的数模转换器是一个“4-4-4”分段的12位电流舵型DAC。
The dissertation designs a 12-bit "4-4-4" segmented current steering DAC.
本文设计的数模转换器是一个“4-4-4”分段的12位电流舵型DAC。
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